RADIATION HARDENED 14-T SRAM BitCell WITH OPTIMIZED POWER AND REDUCED AREA

dc.contributor.author	RAJESH KUMAR RAUSHAN, 18032020046
dc.date.accessioned	2021-01-19T05:32:10Z
dc.date.available	2021-01-19T05:32:10Z
dc.date.issued	2020
dc.identifier.uri	http://10.10.11.6/handle/1/661
dc.publisher	GALGOTIAS UNIVERSITY	en_US
dc.subject	VLSI DESIGN	en_US
dc.title	RADIATION HARDENED 14-T SRAM BitCell WITH OPTIMIZED POWER AND REDUCED AREA	en_US
dc.type	Thesis	en_US